(Appeal 2008-3485; App. No. 10/419,121; Tech. Center 2100)
Decided: February 3, 2009
McGrath discloses a microprocessor which implements a particular instruction. The representative claim on appeal was a method which included the step "executing a security initialization instruction." The claim further described the instruction as causing specific transmitting and retrieving actions, and further stated "the security initialization instruction is a single instruction including a plurality of atomically executed microcode components."
The reference used for anticipation disclosed a microprocessor instruction related to security, and the Board found that this instruction performed the claimed transmitting and retrieving actions. The Board then used what I think is strained reasoning to find that the instruction in the reference was atomically executed as claimed.
Ellison discloses the execution of a series of steps in a specified order and does not disclose that the execution of any of the steps in the series is interrupted by other processes. Therefore, construing the term “atomic” broadly but reasonably and in light of the Specification, which discloses that “to execute atomically refers to executing to completion in a specified order without interruption” (Spec. 12, ll. 17-18), we agree with the Examiner that Ellison discloses executing the iso_init instruction that causes the execution of a series of steps to completion in a specified order without disclosure of any interruption (i.e., “atomic”).So the Board says that because the reference did *not* mention that interruptions *could occur* during the instruction, this means the reference implicitly taught that interruptions *could not occur*.
(Ex parte McGrath, p. 9, emphasis added.)
Since when is an ABSENCE of teaching NOT X the same as TEACHING X? Maybe this makes sense if a reference is expected to teach everything. In that case, the fact that something is not mentioned becomes important. But references do not say everything. Patents in particular have good reasons for leaving out lots of stuff. So I don't think it's proper, as a general rule, to draw an inference about the absence of a teaching in a patent reference. And I think the Board's reasoning is ridiculously strained.
The only thing worse than this reasoning is that the Board ignored a statement in the reference about interruptability of instructions from which a strong inference could be drawn. Specifically, the reference listed particular instructions as non-interruptible – and did not include the iso_init instruction relied on by the Examiner in this list! In the Appeal Brief, the Appellant pointed out the logical inference: that a POSITA would not understand the iso_init instruction to be non-interruptible, since it wasn't in the list. The Reply Brief also rebutted the Answer's alternative explanation of this teaching. And the Board said nothing at all about this important argument.
In my opinion, the Appellant had the better argument. But regardless of which side was more persuasive, it's incomprehensible to me that the Board didn't bring this up, and instead relied on an absence of a teaching that iso_init was interruptible as implying that iso_init was non-interruptible (as claimed).