Takeaway: In Ex parte Fujimori, BPAI affirmed an obviousness rejection of a claim to a single chip supporting multiple wired Ethernet physical protocol sub-layers. No interaction between the protocol sub-layers was claimed. The Applicant argued that the primary wired Ethernet reference could not be combined with the secondary wireless Ethernet reference without changing the principle of operation of the primary reference. The Board disagreed, nothing that obviousness does not require the bodily incorporation of one reference into another. The Board concluded the claimed combination is "a simple arrangement of old elements, with each performing the same function it had been known to perform, yielding no more than one would expect from such an arrangement."
Ex parte Fujimori
Appeal 2009007214; Appl. No. 10/282,933; Tech. Center 2400
Decided February 28, 2011
The technology in the application on appeal involved a physical layer integrated circuit for high speed wired Ethernet. A representative claim on appeal read:
1. A single-chip multi-sublayer PHY to support 10 Gigabit digital serial communications, said single-chip comprising:
a PMD transmit/receive CMOS sublayer supporting at least 10 Gigabit Ethernet operation, 10 Gigabit Fibre Channel operation, and signal equalization;
a PMD PCS CMOS sublayer supporting at least 10 Gigabit Ethernet operation and 10 Gigabit Fibre Channel operation;
a XGXS PCS CMOS sublayer supporting at least 10 Gigabit Ethernet operation and 10 Gigabit Fibre Channel operation; and
a XAUI transmit/receive CMOS sublayer supporting at least 10 Gigabit Ethernet operation and 10 Gigabit Fibre Channel operation.
The Examiner rejected the originally filed claims – which did not include the "signal equalization" limitation – as obvious over Applicant admitted prior art in view of a 10 Gigabit Ethernet whitepaper. According to the Examiner, the Background section of Applicant's specification taught everything but Fibre Channel operation. The Applicant argued that the references did not teach that the claimed functionalities were present in a CMOS sublayer.
The Examiner withdrew the obviousness rejection and rejected as anticipated by a integrated circuit datasheet published by Mindspeed. The Applicant amended to distinguish, by adding the "signal equalization" limitation to the PMD transmit/receive CMOS sublayer.
The Examiner changed the obviousness rejection to use a different secondary reference. The Mindspeed publication used as a primary reference disclosed an Ethernet transceiver having the three (protocol) sublayers, and all the claimed functionality except for signal equalization in the PMD tx/rx CMOS sublayer. As the new secondary reference, the Examiner used a reference teaching signal equalization in a PMD sublayer.
The Applicant argued that the secondary reference taught signal equalization in a different layer (XAUI tx/rx) than claimed (PMD tx/rx). The Applicant went on to argue:
In fact, Shi does not disclose or suggest any PMD sublayer characteristics or functionalities whatsoever. ... Therefore, the proposed combination of Mindspeed and Shi does not teach or suggest "a PMD transmit/receive CMSO sublayer supporting at least 10 Gigabit Ethernet operation, 10 Gigibit Fibre Channel operation, and signal equalization," such as recited in claim 1.
The Examiner switched the secondary reference again, to a draft proposal for a new Ethernet standard. The Applicant argued that the secondary reference was directed to a wireless protocol (802.16 or WiMAX), where 10 Gigabit Ethernet was a wired protocol. "Therefore, the electrical and protocol characteristics of the PHYs for the 10 Gigabit Ethernet protocol and the IEEE 802.16 protocol are completely different.
The Examiner maintained the rejection, and Applicant went to appeal. In the Appeal Brief, the Applicant argued:
Since Hunter relates to a wireless protocol and 10 Gigabit Ethernet relates to a wired protocol, Hunter does not (and cannot) disclose "a single-chip multi-sublaver PHY to support 10 Gigabit digital serial communications, said single-chip comprising a PMD transmit/receive CMOS sublayer supporting at least 10 Gigabit Ethernet operation . . . and signal equalization," as recited by Applicant's claim 1 (emphasis added).
Hunter cannot modify Mindspeed because Mindspeed relates to a wired protocol and Hunter relates to a wireless protocol with different electrical and protocol characteristics of the PHY. Any changes to Mindspeed using the teachings of Hunter will change the principal of operation of Mindspeed since Mindspeed and Hunter teach different PHY protocol characteristics.
The Board said the Applicant went wrong in assuming that the combination involved literally ("bodily") incorporating the wireless chip into the wired chip.
That is, the test for obviousness is not whether Hunter can be bodily incorporated into the structure of Mindspeed, but rather it would have been obvious to combine Hunter’s teachings that a PMD sublayer can be used to support signal equalization to the teachings of Mindspeed’s PMD sublayer that supports signal conditioning. ... [W]e conclude that such combination is no more than a simple arrangement of old elements, with each performing the same function it had been known to perform, yielding no more than one would expect from such an arrangement. See KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 406 (2007). The skilled artisan would “be able to fit the teachings of multiple patents together like pieces of a puzzle” since the skilled artisan is “a person of ordinary creativity, not an automaton.” Id. at 420-21. Appellants have presented no evidence that supporting signal equalization (as discussed by Hunter) as Mindspeed’s signal conditioning was “uniquely challenging or difficult for one of ordinary skill in the art” or “represented an unobvious step over the prior art.” See Leapfrog Enters., Inc. v. Fisher-Price, Inc., 485 F.3d 1157, 1162 (Fed. Cir. 2007) (citing KSR, 550 U.S. at 418-19).
My two cents: The lesson here: a claim to a combination of known elements is prima facie obvious over a combination of references that does not teach how to accommodate technical differences between the elements, as long as the claim doesn't capture how the differences are handled either. Here, even if there were differences in the "electrical and protocol characteristics" of Gigabit Ethernet's physical layer WiMAX's physical layer, so what? Nothing about electrical or protocol characteristics was expressed in the claims.
So if there is some technical magic involved to bridge the differences, put that magic in the claims. Otherwise, the PTO will assume that you did nothing more than place three existing protocol sublayers on the same chip.