Ex parte Morrow
Appeal 2007-3972; Appl. No. 10/027,978; Tech. Center 2100
Decided: May 8, 2008
The application on appeal was directed to a memory controller for a computer system. Two of the independent claims on appeal read:
14. An apparatus, comprising:
a memory controller; and
a table walk device connected to the memory controller and externally located from a memory management unit (MMU).
23. A system, comprising:
a discrete memory controller adapted to perform a table walk operation and coupled to the processor; and
a volatile memory device coupled to the discrete memory controller.
The Examiner originally rejected the independent claims as anticipated by McCarthy and Gaskins, respectively. In response, the Applicant argued the "discrete" limitation of claim 23 and amended claim 14 to add the "externally located" limitation. In view of this amendment, the Examiner switched to a different 102 reference (Arimilli) for claim 14, but maintained the Gaskin rejection of claim 23.
The Applicant appealed. While acknowledging that each of the two references taught table walk functionality, the Applicant argued that other limitations were not disclosed by the respective references.
With respect to claim 14, the Applicant argued the claim required a direct connection between the "table walk device" and the "memory controller," based on this statement in the Specification: "... in particular embodiments, 'connected' may be used to indicate that two or more elements are in direct physical or electrical contact with each other." In contrast, Arimilli's tablewalk controller 78 was part of a CPU unit 20, and CPU unit 20 was not directly connected to memory controller 24. Thus, the Applicant concluded that "Arimilli fails to teach or suggest a table walk device connected to the memory controller and externally located from a memory management unit as recited in Appellant's claim 14." (Emphasis in original.)
Turning to claim 23 and Gaskins, the Applicant argued that the table walk logic 106 in Gaskins was not "a discrete memory controller" but was instead "part of a processor data unit that interfaced with a memory controller over a processor data bus." As part of the processor data unit, Gaskins table walk logic 106 suffered from "the latency problems through MUXs 104,704 that Appellant's embodiments are intended to reduce."
The Examiner addressed these arguments in the Answer. The Examiner asserted that Gaskins' table walk logic 106 was properly understood as a "memory controller" since it performed functions that controlled memory. Second, the presence of additional memory controllers that interface with table walk logic 106 was irrelevant since the claim used "comprising." Finally, table walk logic 106 was "discrete" because it was "discrete from the other devices in Figure 1" such as 102 and 116.
The Board affirmed both prior art rejections. Starting with the Broadest Reasonable Interpretation of "discrete memory controller," the Board found that the Applicant's Specification disclosed that the memory controller 160 controlled memory and performed virtual-to physical address translation. Thus, the Specification did not use this term in a manner different than ordinary meaning. The Board next turned to a technical dictionary for a definition of "controller:"
contoller2 : a device upon which other devices rely for access to a computer subsystem. It controls access to one or more disk drives, managing physical and logical access to the drive or drives.Based on this ordinary meaning to a POSITA, the Board interpreted the phrase "discrete memory controller" as "a device that manages logical and physical accesses to a memory device."
Microsoft Press Computer Dictionary, Second Edition, 1993, p. 95.
Applying this to the rejection of claim 23, the Board found that "discrete memory controller" read on Gaskins' table walk logic 190, since that logic managed data in the translation lookaside bufffer. Gaskins also met the limitation that the discrete memory controller was "coupled to a processor" since "the data unit which houses the table walk logic can be connected to another microprocessor, via a host bus." (Emphasis added.)
Turning to the rejection of claim 14, the Board noted the Applicant's acknowledgement that Arimilli disclosed a table walk controller communicating with a memory controller. This implied to a POSITA that the two were connected, as required by the claim. Notably, the claim did not require the memory controller to be in direct physical connection with the table walk device. In addition, Armilli disclosed that the CPU 20 was externally coupled to a memory management units 48 and 50. Since CPU 20 included table walk device, this met the "table walk device externally located from" an MMU limitation. )
My two cents: Yes, it's a really old decision (2008), but it's about Broadest Reasonable Interpretation, a standard which hasn't really changed over the years.
The Board messed up here. The only point of contention that the Board got right was "table walk device connected to the memory controller" in claim 14. The BRI of "connect" does not require direct connection, which means Arimilli's memory controller 24 was connected to tablewalk controller 24.
First point the Board got wrong: Arimilli and "externally coupled." The Board started by erroneously asserting that the Applicant had admitted this. In fact, the Applicant merely stated that CPU 20 included MMUs 48 and 50. Next, the Board's Finding of Fact 4 – Arimilli taught that MMU 48/50 was "externally coupled" to the tablewalk controller 78 – read too much into the reference. Arimilli's description did not characterize the coupling as external or internal, so all we have to go on is the block diagram, which shows the two components side by side. If the Board interpreted this as an "external coupling" they should have explicitly stated so.
Second, and most glaring error, is that the Board completely ignored the word "discrete" – and didn't even say so! The Board started with a technical definition of "controller." Now, that definition refers to disk drives, not memory – but okay, "memory" modifies "controller" so "memory controller" becomes "device that manages logical and physical accesses to a memory device." But what about the modifier "discrete" ?? It just disappeared:
Therefore, we interpret a “discrete memory controller” as a device that manages logical and physical accesses to a memory device.Inexcusable. If the Examiner was right – discrete means "distinct from" and the memory controller was in fact distinct from other components – then say so. Or enter a new obviousness rejection on the grounds that it's obvious to make the memory controller "discrete" because it's a design choice, or one of a limited few ("finite") choices, etc. But it's not right to simply ignore the qualifier.